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Tech Talk Articles

karl DietzThe articles below written by our own Karl Dietz, are published monthly in CircuiTree Magazine. Karl has over 35 years of experience in a variety of R&D, manufacuring and quality control functions and holds a PhD in organic chemistry from the University of Frankfurt, Germany. His current responsibilities include application studies for printed circuit boards at our Electronic Materials Laboratory at Research Triangle Park, NC.

Dry Film Photoresist Effluent Displosal Considerations

Resist skins are filtered from stripper solutions to prevent redeposition during spraying of the stripper solution and clogging of spray nozels and to prolong the life of stripping solution chemistries.

 

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Some Health and Effluent Disposal Considerations in PWB Fabrication

New restrictions on the permitting process of new PWB facilities in China, driven by environmental considerations, highlight the importance of these questions and warrant a closer look.

 
Fine Line Etching Revisited (Part B)

This column, the second of a two part series, looks at ways to extend the subtractive technology to achieve finer features.

 

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Fine Line Etching Revisited

This article looks at ways to extend the subtractive technology to achieve finer features. Some technical advances described here have found commercial acceptance whereas others don't appear to have gained traction.

 

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Forty Years of Dry-Film Photoresist Technology

When Jack Richard Celeste of the DuPont Company submitted his patent application for a dry film photoresist to the US Patent Office on September 11, 1968 he could have hardly imagined how his invention was going to change the world of printed circuit board fabrication.

 

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Nanoparticles in Electronics

There is growing interest in the use of nanoparticles and their use in nanocomposites, not only in electronics but also in other fields such as engineering polymers, surface finishes, optics, and medical applications.

 

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Defect Problems & Defect Prevention in Development

Many improvements in equipment design and in equipment maintenance have reduced the number of defects that are associated with development.

 

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Advances in Copper Plating (Part B)

Last month's Tech talk covered several advances in copper plating, including environment advances, and new applications such as copper pillar plating on wafers.

 

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Advances in Copper Plating (Part A)

Copper is displacing aluminum in IC fabrication, copper pillars are competing with solder bumps, new plating processes and plating bath compositions allow to plate micro-vias "shut" in a bottom-up via-fill process and enable the metallization of TSVs.

 

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Full-Build Electroless Copper

Electroless copper plating is widely used in PWB fabrication to form metal seed layer on through-hole and blind via hole walls to enable the formation of a thicker copper deposit by electroplating. The use of electroless copper plating to deposit all of the copper (full-build) made some inroads in the 1980's but disappeared lateralmost completely for a number of reasons we shall look at.

 

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Immersion & Electroless Metallization Processes

The term "electroless", as in electroless nickel process, is a curious one and has led to considerable confusion. In its literal meaning, it labels processes that proceed withot applying an external electrical potential to drive the reaction.

 

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Ferric Chloride Etching of Copper

This Tech Talk column attempts to give some background on ferric chloride etching, including anecdotal information that I have collected from the industry.

 

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The First 150 Tech Talks - a Reflection

In January 2004 Tech Talk Number 100 was issued. I used the occasion to reflect on industry changes during the course of the last 100 months that seemed noteworthy, and I reminisced about the beginnings of this column.

 

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Opens and Shorts

All PWBs, modules, and IC packages consist of conductive features (circuit lines, vias, pads, power and ground etc) insulated from each other by non-conductive (dielectric) material.

 

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Adhesion to Copper - Trends and Issues

First and second level packaging has always wrestled with yield and electronic packaging reliability issues that are associated with low adhesion of the copper to an adjacent organic phase...

 

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Dry Film Photoresist Coating Base Film and Coversheet Considerations

When Jack Richard Celeste's "process for making (dry film) photoresists" was first introduced commercially by DuPont, it profoundly changed the fabrication of printed circuit boards.

 

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Resist Loading in Aqueous Developers

To properly control te developer in a feed-and-feed operation the addition of fresh developer solution ("feed") needs to be tied to the rate of consumptior of carbonate, the active ingrediaent in the developer.

 

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Staying Out of Trouble in Gold Electro-plating

Several gold plating processes are being practiced in PWB fabrication: there is ENIG (electroless nickel, immersion gold), electroless gold which allows thicker gold depodits that ENIG, and there are gold electroplating processes.

 

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Image-to-Registration

Several strategies are being employed in PWB fabrication to assure that metallized vias and drilled through-holes align with circuit patterns and solder connections.

 

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Hot Roll Lamination - Heat Input and Temperature Control

In hot roll lamination, heat is applied to the rolls and transferred through the polyester film coversheet and the resist to the resist/copper interface to achieve good resist to copper conformation and adhesion.

 

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Improving and Measuring Tenting Performance of Dry Film Photoresists

Tenting resists have to perform almost perfectly because a board may have thousands of hole, and one broken tent will cause a scrapped board. Therefore tenting tests are often done under stressed conditions to obtain a statistically significant number of tent failures.

 

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Wafer-Level Processing Equipment: How does it compare to PWB processing?

WLP creates a package or elements of a package on the wafer before the wafer is diced. It typically involves the formation of one or more redistribution layers (RDL) which reroute the pad positions of perimeter array designs to bumped area arrays for flip-chips.

 

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Selling Air

If air can be incorporated into the dielectric that surrounds the conductor, thus lowering the effective dielectric constant of the composite, this is of great benefit to many electronic devices.

 

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More on Copper Whiskers

Copper whiskers are ugly filaments that form during copper electroplating and can obviously lead to defects such as space violations and shorts...

 

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Inkjetting Conductors

Inkjetting legend print is definitely a reality, inkjetting etch resist is coming along, iinkjetting soldermask was demonstrated by Schmid at Productronica 2005, but inkjetting conductors or semiconductors seems more distant...

 

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Touch-up and Repairs

Touch-ups and repairs are either incompatible or inpossible with very fine line circuits. Neverthe less, it might be an interesting subject since PWB fabricators' product mix is not necessarily all fine line work...

 

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The Effects of Lamination Roll Mechanics on Conformation

Lamination roll strength and roll covering properties of hot roll laminators affect conformation of dry film causes the nip pressure to vary across the circuit board width...

 

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Copper-Copper Peelers

This dreaded defect, as the name suggests, refers to a situation where two layers of copper have insuffiecient adhesion so that the two layers can peel apart if stress is induced...

 

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Safe Lighting in Yellow Room Exposure Areas

Photoresist is not only sensitive to UV-radiation but also to near UV visible light in the 410 to 430nm range which makes up the violet and blue light of the visible spectrum. This visible light is not "safe"...

 

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Reminiscing About Fully Additive Processes, Electroless Copper, and Direct Metallizations

Reflecting on some changes in the metallization of PWBs we have experienced during the last twenty odd years...

 

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Fine Lines in High Yield - Compatibility of Different Resists in Developer Chemistry

If a PWB fabricator processes different dry film photoresists through the same developer machine and chemistry, the question about "compatibility" of the different resists usually comes up...

 

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Fine Lines in High Yield - Via Fills

Microvias, buried vias, and plated through holes are filled with conductive or nonconductive materials for a number of reasons.

 

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Fine Lines in High Yield - Copper Whiskers

Copper whiskers? Who has heard and cares about copper whiskers! You probably meant tin whiskers? No, copper whiskers! True, the phenomenon of "tin whisker growth" has fascinated and plaqued the industry for decades.

 

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Fine Lines in High Yield - HDI Trends and Developments

Traditional HDI (high density interconnect) structures feature microvias in so called build-up layers. the microvias in adjacent build-up layers are off-set, or "staggered".

 

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Fine Lines in High Yield - Lamination and Coating Equipment

At the last TPCA show I noticed a remarkable variety of new coating and lamination equipment and  upgrades of established equipment lines which prompted me to do a short review of this subject.

 

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Fine Lines in High Yield - Troubleshooting the PWB Fabrication Process

Process engineers in charge of increasing the overall yield of a PWB fabrication process need tools to track yield trends and to assign probable cause to defect types.

 

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Fine Lines in High Yield - Beyond the Limits of Semi-Additive Processing?

The first circuitry in electronic packaging is found in the build-up microvia layers of IC packages. These circuits are formed by semi-additive processing which means a resist pattern is formed on top of very thin electroless copper.

 

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Fine Lines in High Yield - High Performance Dielectrics

As I was reviewiing Technology Roadmaps of OEMs, PWB fabricators, and of industry consortia I was amazed at the multitude of exotic base materials listed for PWBs as well as for IC packaging substrates.

 

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