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Wafer Level Packaging Solutions

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for Thin Wafer Processing

DuPont Wafer Level Packaging (WLP) Solutions recently presented an overview of wafer level packaging materials to meet the challenges of thin wafer processing at the Thin Wafer Processing for 3D TSV Applications Workshop hosted by SUSS MicroTec, July 15th during Semicon West.

 

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DuPont Wafer Level Packaging Materials Characterization for Thin Wafer Processing

Abstract

Through Silicon Via (TSV) technology and 3D Integration is gaining more attention as a design solution to meet the needs for higher device performance and lower total cost of ownership. The semiconductor and packaging industry is looking for new technologies, and new materials, to meet the goal of true 3D Integration. Polyimides have been used successfully in semiconductor fabrication as stress buffer and RDL passivation layers for wafer-scale packaging.

HD MicroSystems™ now offers thermo-conformable, thermocompressible polyimide adhesives that are specifically designed for wafer bonding as well as chip-scale bonding applications. These polyimide adhesives provide high thermal resistance, excellent chemical resistance, and superior dielectric properties.

Another major challenge in implementing 3D packaging is the formation of high aspect ratio TSV interconnects having low cost and sufficient via uniformity and density. DuPont offers advanced, dry-film photoresist materials and new process technology that can meet these requirements including new specifications regarding via diameter, shape and geometry. DuPont dry films are specifically tailored for high etch selectivity as well as good plating performance. Results also show additional advantages for TSV regarding via protection where unique "tenting capability" of the dry film is employed.

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Presentation given by: Chris Milasincic Global New Business Development Manager for HD Microsystems 

Chris Milasincic is the Global New Business Development Manager for HD Microsystems, a jointly owned company held by Dupont and Hitachi Chemicals specializing in liquid polyimide solutions for semiconductor fabrication. Chris joined DuPont in 1990 and worked in HD Micro since 2006. He is assigned to develop new business applications for liquid polyimides including wafer and chip scale bonding applications for 3D-Integration and new flexible displays using polyimide as a substrate. Chris has a B.S. in Chemical Engineering and a J.D. in Law specializing in Intellectual Property. He is a holder of 4 U.S. patents and has worked as a patent attorney. In addition to other related assignments, Chris has worked in the field of polyimides for over 10 years.